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AD5307BRU

AD5307BRU资料
AD5307BRU
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File Size : 116 KB
Manufacturer:AD
Description:Digital ground reference. Connected to external crystal to excite the ICs internal oscillator and digital clock. Connected to external crystal to excite the ICs internal oscillator and digital clock. 5.0 VDC 10% digital supply voltage with respect to VSSD. Digital output, active high. Logic 1 state indicates 10 bit times of idle line, logic 0 indicates detection of carrier or non-idle line. Digital input. After the preamble, a low on DI (SPACE) transmits a superior2 state on SO, a high on DI (MARK) transmits a superior1 state on SO. Digital output. After the preamble and assuming standard polarity: if superior1 state is detected on SI, RO will be high (MARK), if superior2 state is detected on SI, RO will be low (SPACE). Digital input. Logic 1 (default, internal pullup) selects 10-bit frame (START, eight data bits, STOP), logic 0 selects 11-bit frame (START, nine data bits, STOP). Active low digital output. Enables the external output amplifier when driven high. Tri-states the external output amplifier when driven low. Active low digital input. RST* asynchronously forces RO and ILD outputs to a high state and TS* to a low state. RST* can be asserted anytime during normal operation to force the reset state. RST* must be active (low) for 1 µsec after VDDD and VDDA stabilize and the crystal oscillator stabilizes to guarantee the internal reset state. See Figure 10. Analog ground reference. Analog signal output. Tri-state enabled with internal signal. Connection for 680pF capacitor to ground. Connection for 680pF capacitor to ground. Analog signal input. 5.0 VDC 10% analog supply voltage with respect to VSSA. Reserved pin for testing. Digital ground reference.
 
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型 号:AD5307BRU
厂 家:AD
封 装:NULL
批 号:07+
数 量:100
说 明:全线原装军品代理,《货真价实》
 
 
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